About

After designing Punk SVF, i asked myself: "how far can i go with integrators and hacky decisions?". This VCO is the answer. It's a simple circuit of 6 op-amps, 3 transistors, 3 diodes, 1 capacitor (excluding denoise caps) and 20 resistors. It also is a fairly primitive-looking VCO module. Its main gimmick: for this few parts and this simple a build, it gives you over 18 octaves of frequency span - from about 2 cycles per minute (0.033Hz) to over 13 kilocycles per second (13KHz). There are designs that allow even more insane range, so perhaps "Ultra-Widerange" is a bit subjective despite the objectively insane pitch span. However i didn't see one that also uses entirely generic components and is hideously simple in construction like mine. UWR uVCO tracks exponentially, but not 1V/Oct across all of its range. However, it can be tuned to track 1V/Oct over a couple octaves no problem. Its veroboard footprint is smalll, and it is a suitable project for beginners, although maybe not all fresh ones.

The controls are very simple and VCO-generic. Up top is the initial frequency setting. Below it are the attenuators for the two CV inputs. The first one doubles up as a fine tune knob if nothing is patched to its respective input jack. Below the knobs is a "FULL/LOW" switch, but don't get fooled - this does not add/remove a capacitor to the timing circuit to drop the overall range: it merely limits the effective range of control. The design started off as a clock source, so i kept an option to limit the frequency span to where you expect a clock to be. Finally, the four jacks - also very generic: the aforementioned CV inputs' jacks, and below them are the two VCO outputs. The sawtooth is downwards-falling and bipolar, and the squarewave is unipolar - again, because the module was meant to be a clock source first and foremost.

A little tradeoff of the circuit's simplicity and hackiness is that the sawtooth output starts getting a negative DC offset after the VCO's pitch crosses about 13KHz, while the sawtooth loses amplitude. Naturally, the pulse detector subcircuit goes nuts from this DC offset and stops emitting a feasible pulse. So although you will hear something out of the sawtooth output past 13KHz up to about 15KHz, do note that it is heavily offset and the squarewave out is out.

To sum it up: this is a somewhat hacky and very compact design that nets you a working VCO of a considerably insane range for literal pennies, but in exchange for that, it acts interestingly at very high frequencies and does not track 1V/Oct ideally over its entire range. There probably are some precision wide-range VCO designs out there for those who need them; that would not be me. Whoever just made it out of the Atari Punk Console skill level of SDIY or just needs a simple wide-range signal source will find this design fun and handy!

Schematic

As i always say.. the design is very simple! But no, really, this time it sorta is, and can be analysed linearly left to right. You can find my analysis down below, and the build materials through the "download build materials" link at the page header. Do note that the schematic does not show the op-amp power pins (everything goes from ±12V), the power ribbon connector and the PSU noise bypass capacitors, which are necessary!

Frequency control inputs

First things first, we need a current sink: i'll explain why later, but we really do. A current sink is a device that takes in some voltage and draws proportional current from somewhere down the line. The lower the voltage at its input, the more current it should draw. A single inverted mixture of the pitch knob and the incoming CVs has to be made to be input to the current sink.

IC1A is set up as an inverting summator that mixes down the pitch control nodes. The initial frequency potentiometer travels between -12V and +11V. R1 is in place to cap the higher extent, since no matter the calibration, the knob ends up being near-useless at the top 5% of the turn otherwise. The two attenuated CV inputs are also added to the mix. Note that R3 = R4 = 100K, so the initial setting is unity-gain, but R9 = R16 = 22K, which yields about 4x amplification for both incoming control voltages. This is done so that even a weak 6Vpp LFO could suplex the VCO's pitch back and forth between the extreme extents. The first CV input jack has +12V normalled into it through R2=1M, which makes it a fine tuning pot offsetting the IC1A 12V * (50K/(1M+50K)) * (100K/22K) = 2.5V up maximum if nothing is patched in. The resulting inverted sum is then passed down a (R10+trimmer)/R16 voltage divider and drives the base of T1. This voltage is the one the current sink should act in proportionate accord to.

A "LOW" switch adds the R8/R11 divider to the IC1A feedback path. What it does is essentially connect R8 parallel to R4, dropping the feedback resistance, and add a considerable negative offset to the mix at IC1A's inverting input through R11. Since the module was initially a clock source, i wanted to add an option to tame its insane range into what you'd expect a wide-range, but still clocking-oriented clock source to produce. When the switch is on, a full turn of the initial frequency setting covers the region from the unit's minimal frequency to a fraction of its maximal frequency.

Current sink

Wait, proportionate? What kind of proportion? Well, i ideally want the design to track 1 volt per octave to play it musically; don't worry, i will mostly fail anyway, but an attempt is an attempt. That means that for each 1 volt of incoming CV the VCO should double its frequency. Likewise, for every 2 volts it should quadruple. The proportion we're seeking is not exactly linear, but rather exponential. And so, the current source must react exponentially to the incoming control voltage.

Since i'm not the smartest lass, i just went for something i tried before - rip out a nice, ready-made subcircuit that works great from Thomas Henry's VCO-1, then throw away everything i don't like and make it worse! Mr. Henry likely found this circuit in Electronotes popular in SDIY circles, and the circuit iself was likely designed by Bernie Hutchins. I use it so much... maybe i should just start calling it a Hutchins Current Source/Sink?

One issue, though - VCO-1 is an OTA-based VCO, and the OTA expects to be fed current; the design is a current source, while a current sink is needed. Intuition told me changing NPNs for PNPs, swapping which transistor's base drives the device down the line and which is grounded and changing the negative constant current source to a positive one should work. After digging around, i found Thomas Henry applying the same exact logic to convert the source into a sink and drive a CD4046 VCO for his X-4046 VCO design. Problem solved!

The nerdy details on how this subcircuit works can be found in Thomas Henry's VCO-1 and X-4046 VCO project pages and is somewhat tough to fully grasp. I can't explain it better than him and the others, and will stick to the implementation. T1/T2 is the converter's heart, and the two have to be matched for best results; i use the fast lazy way described by Ian Schmitz (pdf) that became a breeze after i put together a permanent testing circuit on a veroboard. IC1B controls the transistor setup to make T2 draw current exponentially-proportionally to the voltage T1's base receives.

Integrator

What is a zero-centered ramp waveshape (or a "rising sawtooth") anyways? It is a signal that rises slowly and linearly to some voltage, then near-instantly drops down to that point's inverse and cycles on. A subcircuit has to be set up that creates such a signal. Using an RC lowpass as a timing source is out: its response function over time is inverse-exponential, not linear.

An op-amp inverting integrator fits the role much nicer - its simplest form is shown in Figure 1. Pump some curent to it through the resistor, and get a linearly decreasing voltage out. As the current charges the capacitor's left side, the op-amp has to push more and more negative voltage to compensate the charging and keep its inverting input at zero, the same potential the non-inverting one sits at. Likewise, draining current discharges the cap, and the output voltage goes up: hence it's an inverting integrator. The integration happens linearly, which is precisely what is required.

In my design IC1C takes on the integrating duty. The timing capacitor C1 is there, but no resistor is coming to it from the left - instead, the inverting input is connected directly to the current sink's output. After all, the only reason we need a resistor in the basic implementation at all is to limit the speed of the charging. If, say, one were to short some positive voltage source to the capacitor, all the current possible will instantly rush to the its left side, the op amp's output will jump to -12V to battle that, and bob's your uncle - within nanoseconds. However, the current sink carefully caps the amount of current it sinks already, in proportion to the voltage it is fed. And since "current sink" can be expanded to "negative current source", we're discharging C1 with it, making the IC1C output voltage rise linearly.

Comparator

The next part of the "what is a ramp" to be satisfied is "sharply go back to the opposite side". This implies detecting the integrator's output voltage being high enough and forcing it to about the same, but negative voltage. This part gets hacky, and is likely where the circuit's uneven 1V/O tracking and strange behaviour on high frequencies come from. But also, it's like, just five parts! IC1D is set up as a comparator, comparing whatever is at its non-inverting input (in+) to the voltage at the inverting input (in-), which is zero. Integrator's output comes in through R15, and the comparator's own output comes back through R14. This creates a considerable hysteresis in the system.

Say, the comparator's output is low, and IC1C's output is stuck at zero. Since the comparator is actually an open-loop op-amp powered from ±12V, -12V goes to in+ through R14. Since we decided the incoming signal is at zero, R14/R15 form a usual voltage divider, and IC1D's in+ is pushed down by -12V * 4.7K/(100K+4.7K) ~= -0.5V. The input signal now has to not just cross zero, but also compensate this offset by going 0.5V above zero. Once the comparator is tripped and its output is high, the same applies in reverse: the input now has to drop below about -0.5V to compensate the 0.5V positive shift at in+ and switch it off.

This is great - we want to detect when the integrator glides to some high enough positive voltage, then make it negative, and then let it glide upwards again. Once IC1C's output is over about 0.5V or so, the comparator switches on, +12V go through D1 and drive T3, which brutally drags the integrator's output down. Once IC1C's output crosses -0.5V, the comparator unflips and IC1C starts gliding upwards normally until the cycle repeats. A keen eye may notice IC1C almost shorts to ground through D1 and T3 when it's on... and that's true! D1 was a 1K resistor in the circuit's early drafts, but replacing it with a diode broadened the VCO range by an immense margin. The current is probably considerable, but also it occurs within a very short timespan, so it seems like a TL07X is too unideal to even notice that before the integrator's output is negative enough and switches it off. If it isn't warm, it's fine, i guess!

A signal of about 1Vpp amplitude is the result of this process. While this is too small for Eurorack world, it is necessary in this case: raising the hysteresis and making the integrator-comparator core itself generate a taller ramp also means it will generate a longer ramp, meaning either the timing capacitor has to be reduced (bad for stability), or the higher end of the frequency span will get significantly reduced.

The hackiness of the process makes the sawtooth slightly positively-offset for some reason, which is compensated for with R19 shifting both comparator tripping points downwards a tiny bit. It pays off later in squarewave symmetry, too. One could call it quits at this stage, but there are two problems: 1) the ramp is upwards-going, and i like sawtooths, which fall, and 2) it's a bit over a volt peak to peak, which is laughable!

Waveform shapers

The rest of the circuit is all simple op-amp stuff. The saw the integrator-comparator core outputs is rising and small, but has to be falling and tall, which is an notebook task for an inverting amplifier. IC2A is set up as one with a gain of R6/R5 = 100K/10K = 10, bringing the sawtooth from puny 1Vpp to mighty 10Vpp, more or less zero centered until it is too high-freq. It also is converted from ramp (rising) to an actual sawtooth (falling), because IC2A inverts stuff. Its output is the bespoke sawtooth; one could slam a passive RC highpass out there to ensure DC-decoupling, but that's just not something i do, since it tends to lead to mysterious patching issues once in a blue moon.

IC2B is set up as another comparator with ground as its threshold, but no hysteresis. It detects the sawtooth's zero-crossing and produces a corresponding pulse, essentially squarewaveizing it. The resulting pulse is a +-12V one, though, so R17/D2 are used to rectify it into a 0-12V one, more expectable from a clocking device. The output impedance of 10K is a bit high, but the huge pulse amplitude compensates for it: the fanout should be about eight modules with 100K input impedance until it drops below 7V. IC2B also drives an LED through R20, because what is a module with something low-frequency going on and no LED if a waste of space?

Development notes

i tried "fixing" the design by replacing the TL074 with a TLE2074, its fancy expensive fast variation. While it fixed the negative offset at over 14KHz and expanded the actual working range of the design to ~17KHz, it also was getting considerably warm during operation. I do believe my hack only works because TL074 and 2N3904 are both not the fastest beasts of the semiconductor world and just manage to avoid getting in trouble by being obnoxious. Just like me! What i'm trying to say is, probably don't go for fancy video-rate op-amps here - i tried and it was worse.

Another thing i tried is completely invert the circuit: current source, downwards-falling saw generated on the integration core, inverted comparator/integrator tripper setup. It worked, but for some reason was much slower and with a tremendously narrower range! I think it is due to T3 becoming 2N3906, a PNP transistor. Either those are slower than 2N3904 NPNs due to manufacturing processes, or i observed how holes being the majority charge carriers is slower by definition :D

Initially i wanted this to be a "Single TL074 One-Hour-Craft" project; the integrator-comparator core itself was set to generate a tall rising saw instead of a tiny one, and a pulse was derived by essentially overdriving the saw with a couple BJTs. Another TL072 has the same footprint as the said BJTs and also lets me run the VCO core with a tiny wave to get a better range + get a proper sawtooth.

Calibration

Theh single trimmpot sets the frequency range of the VCO. Its 13KHz+ end exhibits strange behaviours, but let's face it - people barely go above 10K musically, and music that does is strange behaviour in itself. So we will disregard the high end and instead calibrate for robust perofmance at lowest frequencies, setting the VCO to have the lowest cycle possible while ensuring it cycles on and on even at the lowest setting.

1. Monitor the sawtooth output by either using a voltmeter or controlling a VCO with it. I prefer to do things by ear, so for me it is the latter.
2. Set all the knobs fully counterclockwise, no CVs applied, range switch at FULL.
3. Verify that the sawtooth output is indeed falling down. If it is not, turn the (only) trimmpot until it does.
4. As the sawtooth falls down, turn the trimmpot slowly until you reach a point when it stops and starts climbing up instead.
5. Do about 1.5 turns back, so that it falls again.
6. Verify that it falls all the way down and successfully resets up. If it gets stuck and does not change, wait for a few seconds, then turn the trimmer back a bit further.
7. When a cycle is complete, let it run for a couple more cycles to verify robust operation.

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